Technical Inquiry: Achieving PCIe 4.0 x16 (~31.5 GB/s) with CW-PCIe-8M2 (PEX88048) on CW-N
Officially repliedDear CWWK Support Team,
I am writing to inquire about the PCIe bandwidth configuration for my current hardware setup:
Motherboard: CW-NAS-W680-10G
Expansion Card: CW-PCIe-8M2 (Broadcom PEX88048 PCIe 4.0 x16 Switch)
OS: TrueNAS SCALE (Linux-based)
Physical setup:
The CW-PCIe-8M2 card is installed directly into the primary PCIe x16 slot (no risers, no extenders).
The secondary PCIe x16 slot is left empty.
The card receives additional 6-pin PCIe power.
Currently, the system negotiates the link as follows: LnkSta: Speed 8GT/s (downgraded), Width x16
This results in a theoretical bandwidth of ~15.75 GB/s (PCIe 3.0 x16). However, according to your official block diagram, the top slot supports PEG 5.0 X16 / PEG 4.0 X8.
My core question: Is there any officially supported method to achieve a stable PCIe 4.0 x16 link (~31.5 GB/s) with the PEX88048 card on this motherboard?
Specifically:
Are there hidden BIOS settings, jumper configurations, or DIP switches that control PEG lane allocation/speed for Gen4 switch cards?
Does the motherboard or the CW-PCIe-8M2 card require a specific firmware/BIOS version to properly negotiate Gen4 x16?
Is the PEG 4.0 X8 notation in the block diagram a strict hardware trace limitation for Gen4 devices?
What I have already tried:
Various BIOS configurations (PCIe slot selection, Link Speed overrides, ASPM toggles, etc.)
Despite these efforts, I have been unable to achieve the expected ~31.5 GB/s bandwidth. The link consistently trains at 8GT/s with a (downgraded) flag.
I am using this setup for a ZFS storage pool with multiple NVMe drives and would greatly benefit from the full PCIe 4.0 x16 bandwidth. If achieving this requires a specific BIOS build, hardware revision, or configuration guide, I would be very grateful for your assistance.
I am happy to provide full lspci -vvv logs, BIOS screenshots, or system details if needed. Thank you for your time and engineering support.
Best regards,
Oleg Chekan
https://doc.x86pi.cn/#/docs/fs/VXCQuW3XQSosL8RRJL2ixp/235
All FAQs about the W680 motherboard are available here. You can find all required information, including the method to enable the advanced menu.
https://doc.x86pi.cn/#/docs/fs/VXCQuW3XQSosL8RRJL2ixp/431
This section contains FAQs and technical specifications related to the CW-PCIe-8M2 (PEX88048).
ps:
All contents are set to Simplified Chinese by default. Current online translation tools are highly functional and can assist you with viewing the information. We will complete the optimization of our Chinese website first. Afterwards, we will conduct full translation and proofreading, and release the English version in due course.
Thank you for your support.
Subject: Re: Technical Inquiry: Achieving PCIe 4.0 x16 (~31.5 GB/s) with CW-PCIE-8M2 (PEX88048) on CW-NAS-W680-10G
Dear loodd and CWWK Support Team,
Thank you for providing those documentation links. I have carefully reviewed all the materials you shared, including the Chinese documentation (using translation tools).
Unfortunately, I was unable to find specific information about achieving stable PCIe 4.0 x16 operation with the CW-PCIE-8M2 card on the CW-NAS-W680-10G motherboard.
What I discovered:
While examining the CW-PCIE-8M2 card physically, I found a jumper labeled "PCIe_SEL1" on the PCB. This marking suggests it may control PCIe lane configuration or generation selection.
My specific questions:
1. Does the PCIe_SEL1 jumper affect PCIe generation (Gen3 vs Gen4) or bifurcation settings? If yes, what are the correct jumper positions for PCIe 4.0 x16 operation?
2. Are there any known compatibility issues between the CW-NAS-W680-10G motherboard and CW-PCIE-8M2 card regarding PCIe 4.0 negotiation?
3. Is there a specific BIOS version or configuration required for these two CWWK products to properly negotiate PCIe 4.0 x16 link speeds?
Current situation:
Both the CW-NAS-W680-10G motherboard and the CW-PCIE-8M2 (PEX88048) card are officially advertised by CWWK as supporting PCIe 4.0. Therefore, I expected them to work together at full PCIe 4.0 x16 speeds (~31.5 GB/s). However, the link consistently trains at PCIe 3.0 x16 (~15.75 GB/s), which is only half of the advertised bandwidth for these products.
I would greatly appreciate:
- Direct clarification about the PCIe_SEL1 jumper function
- Specific steps to achieve PCIe 4.0 x16 operation
- Confirmation if this configuration is officially supported and tested
If needed, I can provide:
- Full lspci -vvv logs
- BIOS screenshots
- Photos of the card showing the jumper
- System configuration details
Thank you for your time, and I look forward to your technical support in resolving this matter.
Best regards,
Oleg Chekan
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